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Thesis topic proposal
 
István Oniga
Artificial neural networks hardware implementation using reconfigurable devices

THESIS TOPIC PROPOSAL

Institute: University of Debrecen
computer sciences
Doctoral School of Informatics

Thesis supervisor: István Oniga
Location of studies (in Hungarian): University of Debrecen Faculty of Informatics
Abbreviation of location of studies: DE IK


Description of the research topic:

Syllabus
The aim of the research is to implement artificial neural networks using reconfigurable devices (FPGA). In first phase of the research the implementation is done using high level programming language (Matlab, C, C++). In next phase the PhD. student can chose between possible hardware implementation techniques: using hardware description language (HDL), implementation using System Generator or with high level synthesis (HLS) tools. Case studies: application possibilities of hardware implemented neural networks in pattern recognition.



Bibliography
1. Dennis Silage, Trends in Embedded Design Using Programmable Gate Arrays, Bookstand Publishing 2013, 320 oldal, ISBN 978-1-61863-541-9
2. Editors: Omondi, Amos R., Rajapakse, Jagath C. (Eds.), FPGA Implementations of Neural Networks, Publisher Springer (2006)
3. Jin, Zhanpeng, Autonomously Reconfigurable Artificial Neural Network on a Chip. Doctoral Dissertation, University of Pittsburgh, 2010.
4. Suto, J., Oniga, S., Lung, C. et al. Neural Comput & Applic (2018). https://doi.org/10.1007/s00521-018-3437-x.
5. Suto, J. & Oniga, S. J Ambient Intell Human Comput (2018) 9, Issue 4, pp 1049–1060. https://doi.org/10.1007/s12652-017-0513-5.
6. Oniga, S., and Sütő J. "Optimal recognition method of human activities using artificial neural networks." Measurement Science Review 15, no. 6 (2015): 323-327.. https://doi.org/10.1515/msr-2015-0044
7. Avvaru Srinivasulu, FPGA Implementation of Hopfield Neural Network, LAP Lambert Academic Publishing, 2012, ISBN 3848435454, 9783848435456.
8. Kiran Kintali and Yongfeng Gu, Model-Based Design with Simulink, HDL Coder, and Xilinx System Generator for DSP, MathWorks, White paper, 2012.


Deadline for application: 2022-11-15

 
All rights reserved © 2007, Hungarian Doctoral Council. Doctoral Council registration number at commissioner for data protection: 02003/0001. Program version: 2.2358 ( 2017. X. 31. )