Thesis supervisor: László Pohl
Location of studies (in Hungarian): Department of Electron Devices Abbreviation of location of studies: EET
Description of the research topic:
The CMOS-based digital integrated circuit technology is pushing the boundaries. Numerous, alternative or complementary procedures are being developed and investigated currently. One of these is the concept of thermal-electrical logic circuit (TELC) based on metal insulator transition (MIT). The specific resistance of vanadium dioxide (VO2) that can be used in the TELC devices varies 3-4 orders of magnitude at a few °C temperature change around 68 °C. The output of the logic gates used in thermal-electrical circuits is a resistor made of a MIT capable material that remains on in case of proper supply due to its own self-evolving heat (thyristor-like operation). The MIT resistor can be switched on e.g. by the heat evolved by one or more resistors made of the same or other material placed inside the thermal diffusion length.
Since the difference of specific thermal conductivity of the best and worst heat-conducting materials is only a few orders of magnitude, in contrast to the electrical conductivity of up to 14 to 15 orders of magnitude, thermal systems usually require distributed simulation versus electrical circuit simulations. As the specific resistance of VO2 in the critical range decreases by 30-40% as a result of a temperature increase of 0.1 °C, even the distributed electro-thermal simulation of a single resistor is difficult and extremely time-consuming. In order to simulate the operation of complex TELC circuits, the method of electro-thermal compact modelling of elementary gates or even part of gates must be worked out. The compact models can then be placed in distributed electro-thermal circuit models and their operation and their interaction can be examined by simulation.
The aim of the scientific research work is to develop the compact modelling method of TELC devices and examine their applicability.
The candidate's tasks:
Study the background of the semiconductors based on the thermal-electric principle and the methods for their simulation.
Create simulation models for thermal-electrical logic gates, examine them and give suggestions for compact models.
Examine the operation of logic circuit models built from compact models and evaluate the usability of the results.
Required language skills: English Further requirements: Advanced knowledge of thermal phenomena in electrical systems.
Easy reading of technical literature in English.
Commitment to scientific research.
Number of students who can be accepted: 1
Deadline for application: 2018-07-30
2024. IV. 17. ODT ülés Az ODT következő ülésére 2024. június 14-én, pénteken 10.00 órakor kerül sor a Semmelweis Egyetem Szenátusi termében (Bp. Üllői út 26. I. emelet).
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