Print previewpersonal data approved: 2022. X. 11. Publications |
2020
 from data base, 2021. XII. 22. |
Arató Péter, Rácz György, Markovits Tibor Gergely, Olosz Balázs: Task decomposition algorithm for distributed railway interlocking, In: László, Szirmay-Kalos; Bálint, Kiss (szerk.) Proceedings of the Workshop on the Advances of Information Technology 2020 : WAIT 2020, Budapesti Műszaki és Gazdaságtudományi Egyetem Villamosmérnöki és Informatikai Kar (2020) pp. 148-153. type of document: Part of book/Proceedings Paper language: English
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2020
 from data base, 2021. XII. 22. |
Arató Péter, Markovits Tibor Gergely: Utilizing the spectral properties of the data flow graph in system level synthesis, In: László, Szirmay-Kalos; Bálint, Kiss (szerk.) Proceedings of the Workshop on the Advances of Information Technology 2020 : WAIT 2020, Budapesti Műszaki és Gazdaságtudományi Egyetem Villamosmérnöki és Informatikai Kar (2020) pp. 154-159. type of document: Part of book/Proceedings Paper language: English
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2019
 from data base, 2021. XII. 22. |
Arató Péter, Nagy Dezső, Rácz György: A System-Level Synthesis Approach to Industrial Process Control Design, In: Szakál, Anikó (szerk.) INES 2019 : IEEE 23nd International Conference on Intelligent Engineering Systems, IEEE (2019) 16 type of document: Part of book/Proceedings Paper language: English URL |
2019
 from data base, 2021. XII. 22. |
Arató Péter, Nagy Dezső, Rácz György: Application of a System-Level Synthesis Tool in Industrial Process Control Design, ACTA POLYTECHNICA HUNGARICA 16: (9) pp. 155-172. type of document: Journal paper/Article language: English URL |
2018
 from data base, 2021. XII. 22. |
Rácz György, Arató Péter: Adapting the system level synthesis methodology to industrial control design, In: Bálint, Kiss; László, Szirmay-Kalos (szerk.) Proceedings of the Workshop on the Advances of Information Technology, BME Irányítástechnika és Informatika Tanszék (2018) pp. 131-136. type of document: Part of book/Proceedings Paper language: English
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2018
 from data base, 2021. XII. 22. |
Rácz György, Arató Péter: A Decomposition-Based System Level Synthesis Method for Heterogeneous Multiprocessor Architectures, In: Massimo, Alioto; Hai, (Helen) Li; Jürgen, Becker; Ulf, Schlichtmann; Ramalingam, Sridhar (szerk.) 2017 30th IEEE International System-on-Chip Conference (SOCC), IEEE Circuits and Systems Society (2018) pp. 381-386. type of document: Part of book/Proceedings Paper language: English URL |
2018
 from data base, 2021. XII. 22. |
Rácz György, Arató Péter: A Method for Generating, Evaluating and Comparing Various System-level Synthesis Results in Designing Multiprocessor Architectures, ADVANCES IN SCIENCE TECHNOLOGY AND ENGINEERING SYSTEMS JOURNAL 3: (3) pp. 129-141. type of document: Journal paper/Article language: English URL |
2017
 from data base, 2021. XII. 22. |
Arató Péter, Suba Gergely: A new data flow graph model extended for handling loops and mutable data in high level synthesis, In: Kiss, Bálint; Szirmay-Kalos, László (szerk.) Proceedings of the Workshop on the Advances of Information Technology: WAIT 2017, BME Irányítástechnika és Informatika Tanszék (2017) pp. 23-27. type of document: Part of book/Proceedings Paper language: English
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2007
 from data base, 2021. XII. 22. |
Z Á Mann, A Orbán, P Arató: Finding Optimal Hardware/Software Partitions, FORMAL METHODS IN SYSTEM DESIGN 31: (3) pp. 241-263. type of document: Journal paper/Article number of independent citations: 13 language: English URL |
2001
 from data base, 2021. XII. 22. |
P Arató, T Visegrády, I Jankovits: High Level Synthesis of Pipelined Datapaths, John Wiley & Sons, Inc type of document: Book/Monography number of independent citations: 6 language: English
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| Number of independent citations to these publications: | 19  |
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